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Academic Exhibitions, Demonstrations (33)

    2020
  1. Tohma Kawasumi, Yu Omori, Kazuki Yamamoto, Kazuki Fujita, Keiji Kimura, Hironori Kasahara, "OSCAR Automatic Parallelizing Compiler - Automatic Speedup and Power Reduction -", Waseda Open Innovation Forum 2021, Mar. 2021
  2. Kazuki Fujita, Kazuki Yamamoto, Honoka Koike, Toshiaki Kitamura, Keiji Kimura, Hironori Kasahara, "OSCAR Vector Multicore SystemPlatinum Vector Accelerator on FPGA", in ITBL Booth, IEEE ACM SC (Super Computing) 2020 Exhibition, Online: Atlanta, Nov. 2020
  3. Ryo Koyama, Yuta Tsumura, Dan Umeda, Keiji Kimura, Hironori Kasahara, "Multigrain Parallelization for MATLAB/SimulinkUsing the OSCAR Compiler", in ITBL Booth, IEEE ACM SC (Super Computing) 2020 Exhibition, Online: Atlanta, Nov. 2020
  4. Tohma Kawasumi, Hiroki Mikami, Keiji Kimura, Hironori Kasahara, "OSCAR Parallelizing and Power Reducing Compiler", in ITBL Booth, IEEE ACM SC (Super Computing) 2020 Exhibition, Online: Atlanta, Nov. 2020
    5. 2019
  5. Kazuki Yamamoto, Kazuki Fujita, Yuta Tadokoro, Tomoya Kashimata, Boma A. Adhi, Yoshitake Ooki, Toshiaki Kitamura, Keiji Kimura, Hironori Kasahara, "OSCAR Automatic Parallelizing Compiler - Automatic Speedup and Power Reduction -", in ITBL Booth, IEEE ACM SC (Super Computing) 2019 Exhibition, Denver, Nov. 2019
  6. Kazuki Yamamoto, Kazuki Fujita, Yuta Tadokoro, Tomoya Kashimata, Tomoya Kashimata, Boma A. Adhi, Yoshitake Ooki, Toshiaki Kitamura, Keiji Kimura, Hironori Kasahara, "OSCAR Parallelizing & Power Reducing Compiler - Power is Reduced to 1/7 on ARM -", in ITBL Booth, IEEE ACM SC (Super Computing) 2019 Exhibition, Denver, Nov. 2019
  7. Kazuki Yamamoto, Kazuki Fujita, Yuta Tadokoro, Tomoya Kashimata, Tomoya Kashimata, Boma A. Adhi, Yoshitake Ooki, Toshiaki Kitamura, Keiji Kimura, Hironori Kasahara, "OSCAR Vector Multicore System - Platinum Vector Accelerator on FPGA -", in ITBL Booth, IEEE ACM SC (Super Computing) 2019 Exhibition, Denver, Nov. 2019
    8. 2018
  8. Kazuki Miyamoto, Takumi Kawata, Ken Takahashi, Tomoya Kashimata, Yuto Abe, Boma A. Adhi, Yusuke Minato, Hiroki Mikami, Toshiaki Kitamura, Keiji Kimura, Hironori Kasahara, "OSCAR Automatic Parallelizing Compiler Automatic Speedup and Power Reduction", in ITBL Booth, IEEE ACM SC (Super Computing) 2018 Exhibition, Dallas, Nov. 2018
  9. Kazuki Miyamoto, Takumi Kawata, Ken Takahashi, Tomoya Kashimata, Yuto Abe, Boma A. Adhi, Yusuke Minato, Hiroki Mikami, Toshiaki Kitamura, Keiji Kimura, Hironori Kasahara, "OSCAR Parallelizing & Power Reducing Compiler -Power is Reduced to 1/7 on ARM-", in ITBL Booth, IEEE ACM SC (Super Computing) 2018 Exhibition, Dallas, Nov. 2018
  10. Kazuki Miyamoto, Takumi Kawata, Ken Takahashi, Tomoya Kashimata, Yuto Abe, Boma A. Adhi, Yusuke Minato, Hiroki Mikami, Toshiaki Kitamura, Keiji Kimura, Hironori Kasahara, "OSCAR Vector Multicore System Platinum Vector Accelerator on FPGA", in ITBL Booth, IEEE ACM SC (Super Computing) 2018 Exhibition, Dallas, Nov. 2018
    11. 2017
  11. Ando Kazumasa, Tomoya Shirakawa, Yuya Nakada, Yuki Shimizu, Hiroki Shimizu, Yuto Abe, Hideo Yamamoto, Mamoru Shimaoka, Hiroki Mikami, Keiji Kimura, Hironori Kasahara, "OSCAR Automatic Parallelizing Compiler-[Automatic Power Reduction of OpenCV Face Detection by OSCAR Compiler, Automatic parallelization of applications generated from MATLAB / Simulink(on Intel, arm, Renesas Chips)by OSCAR compiler]", Embedded Technology 2017, Pacifico Yokohama, Nov. 2017
  12. Hiroki Mikami, Boma Anantasatya Adhi, Tomoya Kashimata, Satoshi Karino, Kazuki Miyamoto, Takumi Kawata, Ken Takahashi, Tetsuya Makita, Tomoya Shirakawa, Yoshitake Oki, Toshiaki Kitamura, Keiji Kimura, Hironori Kasahara, "OSCAR Automatic Parallelizing Compiler -Automatic Speedup and Power Reduction-[Parallel Processing of MATLAB/Simulink by OSCAR Compiler on Intel, ARM & Renesas multi cores, OSCAR Parallelizing & Power Reducing Compiler-Power is Reduced to 1/7 on ARM-, OSCAR Vector Multicore System -Platinum Vector Accelerator on FPGA-] ", in ITBL Booth, IEEE ACM SC (Super Computing) 2017 Exhibition, Denver, Nov. 2017
    13. 2016
  13. Izumino Katsuhiko, Yuhei Hosokawa, Ando Kazumasa, Tomoya Shirakawa, Risako Kitamura, Yuya Nakada, Hideo Yamamoto, Mamoru Shimaoka, Hiroki Mikami, Keiji Kimura, Hironori Kasahara, "Oscar Automatic Parallelizing Compiler -- Automatic Speeding and Power Reduction of Multicores --", Embedded Technology 2016, Pacifico Yokohama, Nov. 2016
  14. Akira Maruoka, Yuya Mushu, Satoshi Karino, Kazuki Miyamoto,Takumi Kawata, Kouhei Yamamoto, Tomoya Shirakawa, Yoshitake Oki, Toshiaki Kitamura, Moriyuki Takamura, Keiji Kimura, Hironori Kasahara, "OSCAR Automatic Parallelizing Compiler --Automatic Speedup and Power Reduction--", in ITBL Booth, IEEE ACM SC (Super Computing) 2016 Exhibition, Salt Lake City, Nov. 2016
    15. 2015
  15. Iizuka Shuhei, Yabuki Jun, Ando Kazumasa, Bui Binh Duc , Takahiro Suzuki, Dan Umeda, Izumino Katsuhiko, Yuhei Hosokawa, Hideo Yamamoto, Mamoru Shimaoka, Hiroki Mikami, Keiji Kimura, Hironori Kasahara, "OSCAR Automatic Parallelizing Compiler,Automatic Power Reduction of Real-Time Face Detection by OSCAR Compiler,Automatic Parallelization of Model-based Development Application by OSCAR Compiler", Embedded Technology 2015, Pacifico Yokohama, Nov. 2015.(Academic Exhibition)
    16. 2014
  16. Tomohiro Hirano, Takashi Goto, Shuhei Iizuka,Hideo Yamamoto, Hiroki Mikami, Jun Yabuki, Izumino Katsuhiko, Fujieda Misaki, Moriyuki Takamura, Keiji Kimura, Hironori Kasahara, "OSCAR Automatic Parallelizing Compiler,Automatic Power Reduction on Android Multicore,Automatic Power Reduction of Real-Time Face Detection by OSCAR Compiler", Embedded Technology 2014, Pacifico Yokohama, Nov. 2014.(Academic Exhibition)
  17. Shuhei Iizuka, Hideo Yamamoto, Tomohiro Hirano, Takashi Goto, Hiroki Mikami, Uichiro Takahashi, Sakae Yamamoto, Moriyuki Takamura, Keiji Kimura, Hironori Kasahara, "Power Reduction of H.264/AVC Decoder on Android Multicore Using OSCAR Compiler", IPSJ SIG Technical Report Vol.2014-ARC-204, Oct. 2014.(Demonstration)
  18. Hiroki Mikami, Keiji Kimura, Hironori Kasahara, "Hierarchical Parallel Processing of HEVC Encoder", Poster Session, COOL Chips XVII, IEEE Symposium on Low-Power and High-Speed Chips, Apr. 2014.(Demonstration)
    19. 2013
  19. Kohei Muto, Takashi Goto, Hideo Yamamoto, Hiroki Mikami, Tomohiro Hirano, Moriyuki Takamura, Keiji Kimura, Hironori Kasahara, "OSCAR Automatic Prallelizing Compiler, OSCAR API : Automatic Speed up and Power Reduction on Murticore", Embedded Technology 2013, Pacifico Yokohama, Nov. 2013.(Academic Exhibition)
  20. Kohei Muto, Takashi Goto, Hideo Yamamoto(Fujitsu Laboratories LTD.), Hiroki Mikami, Tomohiro Hirano, Moriyuki Takamura(Fujitsu Laboratories LTD.), Keiji Kimura, Hironori Kasahara, "Profile-Based Automatic Parallelization and Sequential Program Tuning for Android 2D Rendering on Nexus7", Poster Session, LCPC 2013, Qualcomm Research Silicon Valley, Sep. 2013.(Demonstration)
  21. Yohei Kishimoto, Hiroki Mikami, Keiichi Nakano(Olympus Corporation), Akihiro Hayashi, Keiji Kimura, Hironori Kasahara, "Parallel Processing of Multimedia Applications on TILEPro64", Poster Session, COOL Chips XVI, IEEE Symposium on Low Power and High-Speed Chips, Apr. 2013.(Demonstration)
    22. 2012
  22. Dominic Hillenbrand, Yuuki Furuyama, Akihiro Hayashi, Keiji Kimura, Hironori Kasahara, "Opportunities and Challenges of Application-Power Control in the Age of Dark Silicon", Poster Session, The 8th HiPEAC conference, Berlin, Jan. 2013
    23. 2009
  23. Hironori Kasahara, "OSCAR Multicore Compiler and API for Low Power High Performance Computing", Microsoft Research Computing in the 21st Century Conference Poster Session, Nov. 2009
  24. Waseda Univ(Kasahara, Kimura Lab.), Hitachi, Renesas Technology, "Multicore processors for real-time consumer electronics", CEATEC JAPAN 2009, Oct. 2009
  25. Waseda Univ(Kasahara, Kimura Lab.), Hitachi, Renesas Technology, "Multicore processors for real-time consumer electronics", 12th Embedded Systems Expo(ESEC2009), May. 2009
    26. 2008
  26. Hironori Kasahara & Keiji Kimura Laboratory, "High Performance ECO Multicore Computer", TechnoFair WASEDA, Oct. 2008
  27. Hironori Kasahara, "OSCAR Multicore Compiler for Low Power High Performance Computing", Intel Higher Education Program 2008 Asia Academic Forum, Oct. 2008
  28. Akihiro Hayashi, Yasutaka Wada, Hiroaki Shikano, Jun Shirako, Keiji Kimura, Hironori Kasahara, "Compiler Cooperative Heterogeneous Multicore Processor", Waseda University Global COE Program the 2nd International Symposium "Ambient SoC; Recent Topics in Nano-Technology and Information Technology Applications", Jul. 2008
  29. Waseda Univ(Kasahara, Kimura Lab.), Hitachi, Renesas Technology, "(Developed multicore was introduced in the CSTP at the Prime Minister's office)", Council for Science and Technology Policy 74th session http://www8.cao.go.jp/cstp/siryo/haihu74/siryo4.pdf http://www8.cao.go.jp/cstp/gaiyo/honkaigi/74index.html, Apr. 2008
    30. 2007
  30. Hironori Kasahara, Keiji Kimura, "Parallelizing Compiler Cooperative Multicore Technology -- Easy-to-use, High performance, Low power consumption, High-value added Multicore Prosessor --", The 5th Technology Link in W.T.L.O - For International Research Center in Collaboration of Industry and Academia, Oct. 2007
  31. Hiroaki Shikano, Jun Shirako, Yasutaka Wada, Keiji Kimura, Hironori Kasahara, "Power-Aware Compiler Controllable Heterogeneous Chip Multiprocessor", The Sixteenth International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), Brasov, Romania, Sep. 2007
    32. 2004
  32. Yasutaka Wada, Jun Shirako, Takamichi Miyamoto, Hirofumi Nakano, Takeshi Kodaka, Kazuhisa Ishizaka, Keiji Kimura, Hironori Kasahara, "Multigrain Parallel Processing on Chip Multiprocessor", EDS Fair 2005, Jan. 2005
    33. 2001
  33. Hironori Kasahara, "Automatic Parallelizing Compiler Cooperative Single Chip Multiprocessor", JEITA/EDS Fair 2002, Jan. 2002
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