1999

Papers

1. A. Yoshida, K. Koshizuka, M. Okamoto, H. Kasahara, ``A Data-Localization Scheme among Loops for each Layer in Hierarchical Coarse Grain Parallel Processing'', Trans. of IPSJ, Vol.40, No.5, May., 1999.
2. K. Kimura, W. Ogata, M. Okamoto, H. Kasahara, ``Near Fine Grain Parallel Processing on Single Chip Multiprocessors'', Trans. of IPSJ, Vol.40, No.5, May., 1999. (pdf)
3. H. Koide, T. Hirayama, A. Murasugi, T. Hayashi, H. Kasahara, ``Meta-scheduling for a Cluster of Supercomputers'', Proc. ICS99 Workshop, pp.63-69, Jun., 1999
4. T. Tobita, H. Kasahara, ``A Standard Task Graph Set for Fair Evaluation of Multiprocessor Scheduling Algorithms'', Proc. ICS99 Workshop, pp.71-77, Jun., 1999
5. H. Kasahara, M. Kogou, T. Tobita, T. Masuda, T. Tanaka, ``An Automatic Coarse Grain Parallel Processing Scheme Using Multiprocessor Scheduling Algorithms Considering Overlap of Task Execution and Data Transfer'', Proc. SCI99 and ISAS99, Vol.9, pp.82-89, Aug., 1999
6. K. Kimura, H. Kasahara, ``Near Fine Grain Parallel Processing Using Static Scheduling on Single Chip Multiprocessors'', IWIA'99, Nov., 1999 (pdf)
7. M. Okamoto, M. Obata, G. Matsui, H. Matsuzaki, H. Kasahara, S. Narita, ``Multi-grain Parallelizing FORTRAN Compiler'', Trans. of IPSJ, Vol.40, No.12, Dec., 1999.

Technical Reports

1. K. Kimura, K. Manaka, W. Ogata, M. Okamoto, H. Kasahara, ``Performance Evaluation of Near Fine Grain Parallel Processing on the Single Chip Multiprocessor'', Technical Report of IPSJ, ARC-134-5, Aug., 1999 (pdf)
2. K. Iwai, M. Obata, K. Kimura, H. Amano, H. Kasahara, ``Memory access analyzer for a Multi-grain parallel processing'', Technical Report of IEICE, CPSY99-62, Aug., 1999
3. A. Narikiyo, H. Matsuzaki, M. Obata, A. Yoshida, H. Kasahara, ``A Data-Localization Scheme for Macrotask-Graphs with Data Dependencies''', IPSJ ARC, Jan., 2000.
4. K. Manaka, R. Osakabe, Y. Maekawa, H. Kasahara, ``Performance Evaluation and Parallelize of Electronic Circuit Simulation which generate code without array indirect access'', IPSJ ARC/HPC, Mar., 2000.
5. K. Yoshii, G. Matsui, M. Obata, S. Kumazawa, H. Kasahara, ``An Analysis-time Procedure Inlining Scheme for Multi-grain Automatic Parallelizing Compilation'', IPSJ ARC/HPC, Mar., 2000.

Annual Convention

1. A. Narikiyo, S. Yagi, H. Matsuzaki, M. Obata, A. Yoshida, H. Kasahara, ``A Data Localization Scheme for Any Macrotask Graphs with Data Dependencies'', Proc. of 60th Annual Convention IPSJ, 4J-02, Mar., 2000.
2. K. Yoshii, G. Matsui, M. Obata, S. Kumazawa, H. Kasahara, ``A Multi-grain Automatic Parallelizing Compilation Scheme with Analysis-time Procedure Inlining'', Proc. of 60th Annual Convention IPSJ, 4J-03, Mar., 2000.
3. K. Ishizaka, M. Obata, K. Taki, H. Kasahara, ``Multi-Grain Parallelization using OpenMP'', Proc. of 60th Annual Convention IPSJ, 4J-04, Mar., 2000.
4. M. Yamamoto, T. Yamamoto, M. Obata, H. Kasahara, ``A Processor Clustering Scheme for Hierarchical Parallel Processing in Multi-Grain Parallel Processing'', Proc. of 60th Annual Convention IPSJ, 4J-05, Mar., 2000.
5. T. Masuda, T. Tobita, H. Funayama, H. Kasahara, ``A Multiprocessor Scheduling Scheme with Data Preload Considering Memory Capacity'', Proc. 60th Annual Convention IPSJ 4J-06, Mar., 2000.
6. T. Kato, W. Ogata, K. Kimura, T. Uchida, H. Kasahara, ``Performance Evaluation of Single Chip Multiprocessor for Near Fine Grain Parallel Processing'', Proc. 60th Annual Convention IPSJ 4J-07, Mar., 2000.
7. D. Kaneko, M. Obata, S. Wakao, T. Onuki, H. Kasahara, ``Parallel processing of hybrid FEM and BEM for electro magnetic field analysis on SMP'' Proc. 60th Annual Convention IPSJ 5H-07, Mar., 2000.
8. K. Manaka, R. Osakabe, Y. Maekawa, H. Kasahara, ``Performance Evaluation of Electronic Circuit Simulation which generate code without array indirect access'', Proc. 60th Annual Convention IPSJ 5H-08, Mar., 2000.
9. H. Takemiya, H. Ohta, T. Imamura, H. Koide, K. Matsuda, K. Higuchi, T. Hirayama, H. Kasahara, ``Distributed Parallel Scientific Computing Environment -SSP-'', Trans. of JSCES, Vol. 4, May, 1999.