2001

Papers

  1. Keiji Kimura, Takayuki Kato, Hironori Kasahara, ``Evaluation of Processor Core Architecture for Single Chip Multiprocessor with Near Fine Grain Parallel Processing'', Trans. of IPSJ, Vol. 42, No. 4, Apr., 2001. (pdf)
  2. Hiroshi Koide, Hironori Kasahara, ``Meta-scheduling -- Trial for Automatic Distributed Computing'', bit, pp. 10-14, Kyoritsu Shuppan, Vol. 33, No. 4, Apr., 2001.
  3. Hironori Kasahara, Motoki Obata, Kazuhisa Ishizaka, ``Coarse Grain Task Parallel Processing on a Shared Memory Multiprocessor System'', Trans. of IPSJ, Vol. 42, No. 4, Apr., 2001. (pdf)
  4. Motoki Obata, Kazuhisa Ishizaka, Hironori Kasahara, ``Automatic Coarse Grain Task Parallel Processing Using OSCAR Multigrain Parallelizing Compiler'', Ninth International Workshop on Compilers for Parallel Computers(CPC 2001), Edinburgh, Scotland UK, pp.173-182, Jun., 2001. (pdf)
  5. Akimasa Yoshida, Satoshi Yagi, Hironori Kasahara, ``A Data Localization Scheme for Coarse Grain Task Parallel Processing on Shared Memory Multiprocessors'', Proc. of IEEE International Workshop on Advanced Compiler Technology for High Performance and Embedded Systems, pp.111-118, Jul.2001.
  6. Kazuhisa Ishizaka, Motoki Obata, Hironori Kasahara ``Coarse Grain Task Parallel Processing with Cache Optimization on Shared Memory Multiprocessor'' Proc. of 14th International Workshop on Languages and Compilers for Parallel Computing (LCPC2001), Aug., 2001. (pdf)
  7. Takeshi Kodaka, Keiji Kimura, Hironori Kasahara, ``Multigrain Parallel Processing for JPEG Encoding on a Single Chip Multiprocessor'' Proc. of International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA'02), Jan., 2002. (pdf)
  8. S.HASHIMOTO, S.NARITA, H. KASAHARA, K.SHIRAI, T.KOBAYASHI, A.TAKANISHI, S.SUGANO, J. YAMAGUCHI, H.SAWADA, H.TAKANOBU, K.SHIBUYA, T.MORITA, T.KURATA, N.ONOE, K.OUCHI, T.NOGUCHI, Y.NIWA, S.NAGAYAMA, H.TABAYASHI, I,MATSUI, M.OBATA, H.MATSUZAKI, A.MURASUGI, T.KOBAYASHI, S.HARUYAMA, T.OKADA, Y. HIDAKI, Y.TAGUCHI, K.HOASHI, E.MORIKAWA, Y.IWANO, D.ARAKI, J.SUZUKI, M.YOKOYAMA, I.DAWA, D.NISHINO, S.INOUE, T.HIRANO, E.SOGA, S.GEN, T.YANADA, K.KATO, S.SAKAMOTO, Y.ISHII, S.MATSUO, Y.YAMAMOTO, K.SATO, T.HAGIWARA, T.UEDA, N.HONDA, K.HASHIMOTO, T.HANAMOTO, S.KAYABA, T.KOJIMA, H.IWATA, H.KUBODERA, R.MATSUKI, T.NAKAJIMA, K.NITTO, D.YAMAMOTO, Y.KAMIZAKI, S.NAGAIKE, Y.KUNITAKE AND S.MORITA, ``Humanoid Robots in Waseda University---Hadaly-2 and WABIAN'', Autonomous Robots 12, pp.25-38, c. 2002 Kluwer Academic Publishers. Manufactured in The Netherlands., 2002.

Technical Reports

  1. Takeshi Kodaka, Naohisa Miyashita, Keiji Kimura, Hironori Kasahara, ``Near Fine Grain Parallel Processing on Multimedia Application for Single Chip Multiprocessor'', Technical Report of IPSJ, ARC2001-140-11, Aug., 2001. (pdf)
  2. Hirofumi Nakano, Kazuhisa Ishizaka, Motoki Obata, Keiji Kimura, Hironori Kasahara, ``A Static Scheduling Scheme for Coarse Grain Tasks considering Cache Optimization on SMP'', Technical Report of IPSJ, ARC2001-140-12, Aug., 2001. (pdf)
  3. Takayuki Uchida, Takechi Kodaka, Keiji Kimura, Hironori Kasahara, ``Multigrain Parallel Processing on Single Chip Multiprocessor'' Technical Report of IPSJ, ARC2002-146-3, Feb., 2002. (pdf)
  4. Takeshi Kodaka, Takayuki Uchida, Keiji Kimura, Hironori Kasahara, ``Multigrain Parallel Processing for JPEG Encoding Program on an OSCAR type Single Chip Multiprocessor'' Technical Report of IPSJ, ARC2002-146-4, Feb., 2002. (pdf)
  5. Motoki Obata, Kazuhisa Ishizaka, Hiroki Kaminaga, Hirofumi Nakano, Akimasa Yoshida, Hironori Kasahara, ``Coarse Grain Task Parallel Processing on Commercial SMPs'', Technical Report of IPSJ, ARC2002-146-10, Feb., 2002. (pdf)
  6. Shin-ya Kumazawa, Kazuhisa Ishizaka, Motoki Obata, Hironori Kasahara, ``An Analysis-time Procedure Inlining and Flexible Cloning Scheme for Coarse-grain Automatic Parallelizing Compilation'', Technical Report of IPSJ, ARC, Mar., 2002.
  7. Satoshi Yagi, Hiroki Itagaki, Hirofumi Nakano, Kazuhisa Ishizaka, Motoki Obata, Akimasa Yoshida, Hironori Kasahara, ``A Macrotask selection technique for Data-Localization Scheme on Shared-memory Multi-Processor'', Technical Report of IPSJ, ARC, Mar., 2002. (pdf)

Invited Talks

  1. ``OSCAR Single Chip Multiprocessor and Multigrain Parallelizing Compiler'', IEEE International Workshop on Advanced Compiler Technology for High Performance and Embedded　Systems, Romania, Panel: New Architecture and Their Compilers, Jul., 2001.
  2. ``Future of Automatic Parallelizing Compiler", International Workshop on Languages and Compilers for Parallel Computing (LCPC'01) Panel: Future of Languages and Compilers, Kentucky, Aug., 2001.

Academic Exhibition

  1. ``Automatic Parallelizing Compiler Cooperative Single Chip Multiprocessor'', JEITA/EDS Fair 2002, Jan., 2002.

Patents

Published applications for patent

  1. "ELECTRONIC CIRCUIT SIMULATOR", 2001-243272(JP Publication), Sep.07.2001.
  2. "MULTIPROCESSOR", 2001-175619(JP Publication), Jun.29.2001. [Registration of patent:4784792(JP Patent), Jul.22.2011.]