・ Department of Computer Science, Waseda University
・ Advanced Multicore Processor Research Institute, Waseda University
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Office:
55N-505A,505B,506A,507A
Brief personal history:
B.S.(1980,Waseda), M.S.(1982,Waseda),
Dr. Eng. (1985,Waseda). Res. Assoc.(1983,Waseda),
Assist. Prof.(1986. Waseda), Assoc. Prof.(1988,Waseda),
Prof.(1997, Waseda).
Visiting Scholar (1985. Univ. California at Berkeley)
Visiting Research Scholar(1989-1990. Center for Supercomputing R & D, Univ. of Illinois at Urbana-Champaign)
IEEE Computer Society Board of Governor (2009, IEEE)
Young Author Prize: IFAC Triennial World Congress(1987)
IPSJ Sakai Memorial Special Award (1997)
STARC (Semiconductor Technology Academic Research Center) Industry-Academia Cooperative Research Award (2005)
2008 LSI Of The Year The Second Prize (2008)
Key words:
Automatic Parallelizing Compiler, Supercomputing, Chip Multiprocessor (Multi Core), Scheduling Algorithms, Electronic Circuit Simulation.
Research:
- Next generation chip multiprocessor architectures for mobile phones, games, Digital TVs, DVDs, car navigation systems to supercomputers.
- Automatic multigrain parallelizing compilers with memory optimization and data transfer optimizaton/
- Minimum execution time multiprocessor scheduling algorithms considering minimization of data transfer overhead with data decomposition and assignment.
- User friendly application specific parallelizing compilers for electronic circuit simulation, mobile phones, games, car navigation systems, cars, digital TVs, and so on.
Please see Research Topics in homepage of KASAHARA Lab. for more details.
OSCAR : Optimally Scheduled Advanced Multiprocessor